pulsatrix
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device_backend.hpp File Reference

Abstract interface isolating vendor-specific memory/compute operations from Tensor/ComputationGraph. More...

#include <cstddef>
#include <cstdint>
Include dependency graph for device_backend.hpp:

Go to the source code of this file.

Classes

struct  pulsatrix::RecurrentCellArgs
 Operand pointers for DeviceBackend::recurrent_cell (passed to kernels by value). More...
 
struct  pulsatrix::SsmPassArgs
 Operand pointers and dims for DeviceBackend::ssm_pass (passed to kernels by value). More...
 
struct  pulsatrix::ConvGeometry
 Window geometry for DeviceBackend::im2col / col2im_add: kernel size, stride and zero padding per axis. Defaults are stride 1 and no padding. Passed to kernels by value. More...
 
struct  pulsatrix::RlRowArgs
 Operand pointers and dims for DeviceBackend::rl_rows (passed to kernels by value). More...
 
class  pulsatrix::DeviceBackend
 Vendor-agnostic compute/memory backend. CPUBackend, CUDABackend (Phase 1.5), and HIPBackend (Phase 1.6) all implement this contract; Tensor and ComputationGraph depend only on this interface, never on a concrete backend's types. More...
 

Namespaces

namespace  pulsatrix
 

Enumerations

enum class  pulsatrix::DeviceType { pulsatrix::Cpu , pulsatrix::Cuda , pulsatrix::Hip }
 Which physical device a Tensor's buffer resides on. More...
 
enum class  pulsatrix::CopyDirection { pulsatrix::HostToDevice , pulsatrix::DeviceToHost , pulsatrix::DeviceToDevice , pulsatrix::HostToHost }
 Direction of a DeviceBackend::copy() call. More...
 
enum class  pulsatrix::ElementwiseOp {
  pulsatrix::Relu , pulsatrix::Neg , pulsatrix::Tanh , pulsatrix::Sigmoid ,
  pulsatrix::Silu , pulsatrix::Exp
}
 Unary elementwise operations supported by DeviceBackend::elementwise(). More...
 
enum class  pulsatrix::LrpGate { pulsatrix::None , pulsatrix::Positive , pulsatrix::Negative }
 Elementwise boolean gate for DeviceBackend::lrp_stabilized_divide(). More...
 
enum class  pulsatrix::LogicOp {
  pulsatrix::ConjunctionForward , pulsatrix::ConjunctionBackward , pulsatrix::ConjunctionLrp , pulsatrix::DisjunctionForward ,
  pulsatrix::DisjunctionBackward , pulsatrix::DisjunctionLrp
}
 Elementwise passes of the fuzzy-logic modules, for DeviceBackend::logic_pointwise. More...
 
enum class  pulsatrix::RecurrentCellOp {
  pulsatrix::RnnBackward , pulsatrix::LstmForward , pulsatrix::LstmBackward , pulsatrix::LstmLrp ,
  pulsatrix::GruBackward , pulsatrix::GruLrp
}
 Fused per-element recurrent-cell passes, for DeviceBackend::recurrent_cell. Slots (in[] / out[]), all (rows x hidden) per timestep unless noted: More...
 
enum class  pulsatrix::SsmPassOp {
  pulsatrix::MambaForward , pulsatrix::MambaBackward , pulsatrix::MambaGradBC , pulsatrix::MambaLrp ,
  pulsatrix::RwkvTokenShift , pulsatrix::RwkvForward , pulsatrix::RwkvBackward , pulsatrix::RwkvShiftBackward ,
  pulsatrix::RwkvLrp , pulsatrix::RwkvShiftLrp , pulsatrix::StabilizedDiv , pulsatrix::RetnetForward ,
  pulsatrix::RetnetStateGrad , pulsatrix::RetnetGradQK , pulsatrix::RetnetGradV , pulsatrix::RetnetScores ,
  pulsatrix::RetnetReadout , pulsatrix::RetnetLrpInput , pulsatrix::ReverseTimeSum
}
 Fused passes of the state-space / linear-recurrence modules (MambaModule, RWKVModule, RetNetModule), for DeviceBackend::ssm_pass. Dims come from SsmPassArgs: n batch, l sequence length, d d_model (or C for ReverseTimeSum), s Mamba's state_size / RetNet's key_dim. Sequences are (n, l, X) row-major; "states" buffers are (n, l + 1, ...) with the zero initial state at index 0. Lanes and slots (in[] -> out[]): More...
 
enum class  pulsatrix::RlRowOp {
  pulsatrix::DqnLoss , pulsatrix::DqnGrad , pulsatrix::PgLoss , pulsatrix::PgGrad ,
  pulsatrix::PpoLoss , pulsatrix::PpoGrad , pulsatrix::DqnTarget , pulsatrix::PolyakBlend
}
 Fused per-row reinforcement-learning passes, for DeviceBackend::rl_rows. One lane per batch row (per element for PolyakBlend); rows x cols from RlRowArgs. Index slots hold validated whole-number action indices as floats. Slots (in[] -> out[]): More...
 

Detailed Description

Abstract interface isolating vendor-specific memory/compute operations from Tensor/ComputationGraph.